Seminar “Selected Topics in Logic and Verification”
„Verifikation und formale quantitative Analyse“ befindet sich nicht in der Liste (Computational Logic, Automatentheorie, Wissensverarbeitung, Knowledge-Based Systems, Knowledge Systems, Wissensbasierte Systeme, Logische Programmierung und Argumentation, Algebra und Diskrete Strukturen, Knowledge-aware Artificial Intelligence, Algebraische und logische Grundlagen der Informatik) zulässiger Werte für das Attribut „Forschungsgruppe“.
Seminar “Selected Topics in Logic and Verification”
Lehrveranstaltung mit SWS 0/2/0 (Vorlesung/Übung/Praktikum) in SS 2018
Dozent
Umfang (SWS)
- 0/2/0
Module
Leistungskontrolle
- Hausarbeit
- Referat
This seminar is mainly intended for students enrolled in the Master or Diplom programs Informatik (computer science).
Registration and Dates
To participate, please register using the form on the course hompage until Sunday, April 15th, 2018.
All registered students will be informed about the first meeting via email.
Prerequisites
The seminar addresses students that have profound knowledge in theoretical computer science and logics.
- For students of the Master or Diplom program Informatik, the material of the course “Formale Systeme” and “Theoretische Informatik und Logik” is required.
- The seminar is intended for students of the Master program Computational Logic in the second year of their studies that have successfully completed at least one of the following courses: “Model Checking” or “Advanced Logics”.
Course Homepage
Further details can be found here.
